Remote plasma chemical vapor deposition for high efficiency heterojunction solar cells on low cost, ultra-thin, semiconductor-on-metal substrates

textIn the crystalline Si solar cell industry, there is a push to reduce module cost through a combination of thinner substrates and increased cell efficiency. Achieving solar cells with sub-100 µm substrates cost-effectively is a formidable task because such thin substrates impose stringent handling requirements and thermal budget due to their flexibility, ease of breakage, and low yield. Moreover, as the substrate thickness decreases the surface passivation quality dictates the performance of the cells. Crystalline Si heterojunction (HJ) solar cells based on hydrogenated amorphous silicon (a-Si:H) have attracted significant interest in recent years due to their excellent surface passivation properties, potential for high efficiency, low thermal budget and low cost. HJ cells with ultra-passivated surfaces showing > 700 mV open-circuit voltages (Voc) and > 20% conversion efficiency have been demonstrated. In these cells, it has been identified that high-quality a-Si:H films deposited by a low-damage plasma process is key to achieving such high cell performance. However, the options for low-damage plasma deposition process are limited. The main objectives of this work are to develop a low-plasma damage a-Si:H thin film deposition process based on remote plasma chemical vapor deposition (RPCVD) and to demonstrate high efficiency HJ solar cells on bulk substrates as well as on ultra-thin silicon and germanium substrates obtained by a novel, low-cost semiconductor-on-metal (SOM) technology. This manuscript presents a detailed description of the RPCVD system and the process leading to the realization of high quality a-Si:H thin films and high efficiency HJ solar cells. First, p-type a-Si:H thin films are developed and optimized, then HJ solar cells are subsequently fabricated on bulk and ultra-thin Si and Ge SOM substrates without intrinsic a-Si:H passivation. Single HJ cells on ~ 500 µm bulk Si and ~25 µm ultra-thin substrates exhibited conversion efficiencies of η = 16% (Voc = 615 mV, Jsc = 34 mA/cm2, and FF = 77%) and η = 11.2% (Voc = 605 mV, Jsc = 29.6 mA/cm2, and FF = 62.8%), respectively. The performance of the ~25 µm cell was further improved to η = 13.4% (Voc = 645 mV, Jsc = 31.4 mA/cm2, and FF = 66.2%) by implementing the dual HJ architecture without front side i-layer passivation. For single HJ cells based on Ge substrates, the results were η = 1.78 % (Voc = 148 mV, Jsc = 35.1 mA/cm2, and FF = 1.78%) on ~500 µm bulk Ge, compared to η =5.3% (Voc = 203 mV, Jsc = 44.7 mA/cm2, and FF = 5.28%) on ~ 50 µm Ge SOM substrates. Respectively, the results obtained on ultra-thin SOM substrates are among the highest reported in literature for based on comparable architecture and substrate thickness. In order to achieve improved cell performance, dual HJ cells with i-layer passivation of both surfaces were fabricated. First, optimized RPCVD-based i-layer films were developed by varying the deposition temperature and H2 dilution ratio (R). It was found that excellent surface passivation on planar substrates with as-deposited minority carrier lifetimes > 1 ms is achievable by using deposition temperature of 200 ºC and moderate dilution ratio 0.5 ≤ R ≤ 1, even without the more rigorous RCA pre-cleaning process typically used in literature for achieving comparable results. Subsequently, dual HJ solar cells with i-layer films were demonstrated on planar and textured bulk Si substrates showing improved conversion efficiencies of η = 17.3% (Voc = 664 mV, Jsc = 34.34 mA/cm2 and FF = 76%) and η = 19.4% (Voc = 643 mV, Jsc = 38.99 mA/cm2, and FF = 77.5%), respectively.Electrical and Computer Engineerin

Improved Cleaning Process for Textured ∼25 μm Flexible Mono-Crystalline Silicon Heterojunction Solar Cells with Metal Backing

An improved cleaning process is developed to remove front surface contamination for single heterojunction solar cells on textured surfaces on ∼25 μm thick exfoliated, flexible mono-crystalline silicon. The process is very effective in cleaning metallic and organic residues, without introducing additional contamination or degrading the supporting back metal used for ultrathin substrate handling. Quantitative analysis of the Auger electron spectra shows significant potassium contamination reduction (∼0.89% atomic) using the new cleaning process. An open-circuit voltage enhancement of 22 mV and an absolute 1.5% increase in conversion efficiency are observed with the new cleaning procedure for the exfoliated thin solar cells. Thin crystalline silicon (c-Si) solar cells are of much interest due to their potential to achieve high efficiency and reduce cost by using less Si material. However, there are significant challenges to commercialize sub-100 μm thin Si substrates as they can easily break or crack with wafer-handling, resulting in low yield in a solar cell manufacturing line. We have introduced in our earlier work, 1 a kerf-less process in which ultra-thin (∼25 μm) and flexible mono-crystalline Si substrates can be obtained through an exfoliation technique from a thicker (>450 μm) parent wafer. These substrates, when exfoliated, have thick (∼50 μm) electroplated nickel (Ni) metal backing, which provides mechanical support to the thin Si and enables ease of processing for semiconductor device fabrication. Previously we have demonstrated single heterojunction (SHJ) solar cells fabricated on this type of substrate exhibiting efficiencies 14.9% on as-exfoliated substrates. 2 However, on textured surfaces efficiency was limited to 11%. We postulated that one of the issues that could be limiting the performance of the cells is unintentional front surface contamination introduced during wet chemical processes before hydrogenated amorphous Si (a-Si:H) deposition of the front surface emitter, which can limit the open-circuit voltage (V OC ) of these solar cells. This could happen due to the presence of potassium ions introduced from potassium hydroxide (KOH) during texturing. For decontamination we could not use SC-2 solution (5:1:1 ratio of H 2 O, H 2 O 2 , HCl at 80 o C) as it reacts rather aggressively with the electroplated Ni back metal. Instead, we used a piranha solution (1:1 ratio of H 2 O 2 , H 2 SO 4 ) for both decontamination from potassium ions and removal of organic contaminants, which did not seem to show corrosion degradation in the back side Ni. The pH level of HCl is slightly lower compared to H 2 SO 4, and SC-2 solution has a stronger effervescent action than piranha solution. This may explain why the Ni is much more affected by the SC-2 clean compared to the piranha clean. Nevertheless, piranha-treatment alone is probably inadequate for metal residues or potassium related contaminant removal after texturing. In this work, we attempted to address the front surface contamination issue by developing an improved cleaning procedure for textured silicon surfaces for mono-crystalline exfoliated Si substrate. We assumed the cleaning process employed for the rear surface is sufficient as it was done using traditional RCA cleaning 3 on a textured thick parent wafer. With the help of X-ray Photoelectron Spectroscopy (XPS) we have identified the chemical bonding nature of key contaminants at the surface i.e. carbon and potassium. We have also employed Auger electron spectroscopy (AES) to quantify the atomic concentration of the impurities before and after implementation of various wet chemical cleans. We have fabricated and characterized SHJ solar cells on z E-mail: [email protected] both exfoliated and bulk (∼180 μm) substrates to study the effect of contamination on device performance and how an improved surface clean procedure can affect the solar cell efficiency. Experimental A detailed process flow for the exfoliation process is discussed in previous work. 2 Sample 3 was treated with a 1:40 water based solution of SC-15 5 (Surface Chemistry Discoveries, Inc.) at 40 o C for 5 minutes. SC-15 is used as an alternative to RCA clean. It is well documented in the literature 6,7 that SC-1 step (5:1:1 ratio of H 2 O, H 2 O 2 , NH 4 OH at 80 o C) in RCA cleans causes micro-roughening and even pitting of silicon substrates, thereby introducing trap states (D it ) at the heterointerface. 8 We ensure extremely low anisotropic silicon etch rate to reduce roughening the surface by using high dilution (1:40) of SC-15 formulation. This is verified by scanning electron microscopy (SEM) done before and after SC-15 treatment. The surface morphology doesn't change as the solution was not concentrated enough and the temperature wasn't high enough to round off the peaks of the random pyramids that has been typically shown in previous literature 11,12 The chelating agent was used to increase the capacity of the cleaning bath to retain metals in solution by acting as a multi-dentate ligand forming a stable multi-dentate complex with the metal cations, which enhances the dissolution of metallic residues on the silicon surface. 13,14 The temperature of 40 o C aids in the contaminant removal, but is still not high enough to result in anisotropic etching of the silicon. Finally, sample 4 was treate